The present invention is related to systems and methods for performing data processing, and more specifically to systems and methods for maintaining and utilizing interim state data during modified processing.
Data processing circuits often include a data detector circuit and a data decoder circuit. In some cases many passes are made through both the data detector circuit and the data decoder circuit in an attempt to recover originally written data. Each pass through both data detector circuit and the data decoder circuit may include a number of iterations through the data decoder circuit. The number of iterations through data decoder circuit may not yield the best result.
Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for data processing.